Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition

This paper addresses two problems related to disjointsupport decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y ) = h(g(X), Y ) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit implementing f(X, Y ) into a circuit implementing the decomposed representation h(g(X), Y ). Preliminary experimental results indicate that the proposed approach has a significant potential.

• Type: Conference
• Year: 2005
• Where: DATE
• Authors: Andrés Martinelli, Elena Dubrova
• Keywords: Boolean Functions, DATE 2005, Disjoint-support Decomposition, Hardware, Original Circuit