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ISLPED
2005
ACM

Peak temperature control and leakage reduction during binding in high level synthesis

14 years 5 months ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness of such lower level physical phenomenon in high level synthesis algorithms will help to achieve better designs. In this work, we developed a temperature aware binding algorithm. Switching power of a module correlates with its operating temperature. The goal of our binding algorithm is to distribute the activity evenly across functional units. This approach avoids steep temperature differences between modules on a chip, hence, the occurrence of hot spots. Starting with a switching optimal binding solution, our algorithm iteratively minimizes the maximum temperature reached by the hottest functional unit. Our algorithm does not change the number of resources used in the original binding. We have used HotSpot, a temperature modeling tool, to simulate temperature of a number ASIC designs. Our binding algorithm red...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem
Added 26 Jun 2010
Updated 26 Jun 2010
Type Conference
Year 2005
Where ISLPED
Authors Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik
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