Fast FPGA Placement using Space-filling Curve

In this paper, we propose a placement method for islandstyle FPGAs, based on recursive bi-partitioning followed by application of space-filling curves. Experimental results of our method show 55% improvement in cost, when compared to random initial placement of the popular tool VPR. The solutions thus obtained require 44.5% fewer moves during final iterative refinement by ultra-low temperature simulated annealing, whereas the quality of solution is on the average 0.1% better. This establishes the utility of the method for fast reconfiguration of FPGA based co-processors.

• Type: Conference
• Year: 2005
• Where: FPL
• Authors: Pritha Banerjee, Subhasis Bhattacharjee, Susmita Sur-Kolay, Sandip Das, Subhas C. Nandy
• Keywords: FPL 2005, Placement Method, Popular Tool Vpr, final Iterative Refinement