Toward Real Time Fractal Image Compression Using Graphics Hardware

Abstract. In this paper, we present a parallel fractal image compression using the programmable graphics hardware. The main problem of fractal compression is the very high computing time needed to encode images. Our implementation exploits SIMD architecture and inherent parallelism of recently graphic boards to speed-up baseline approach of fractal encoding. The results we present are achieved on cheap and widely available graphics boards.

• Type: Conference
• Year: 2005
• Where: ISVC
• Authors: Ugo Erra
• Keywords: Fractal Compression, Fractal Image Compression, ISVC 2005, Programmable Graphics Hardware