In a carefully structured study spanning several months, the authors visited numerous companies focused on Design For Test methodologies in SoC Test, Characterization, and Failure Analysis. In interviews with the leading engineers in these projects, the various DFT structures and test processes used were studied. The results of the study revealed a number of impediments to the adoption of these processes on low-cost, DFTfocused testers. This paper presents some of the more glaring difficulties together with suggestions as to how they might be overcome.
Kenneth E. Posse, Geir Eide