A Catalog of Hardware Acceleration Techniques for Real-Time Reconfigurable System on Chip

The new technology of reconfigurable System-on-Chip is shown to be a good match to the requirements of realtime embedded systems. In particular, the judicious use of specialised data processing peripherals can reduce the CPU load significantly and greatly ease the task of guaranteeing that real-time deadlines are met in complex multi-processing real-time systems. A catalog of other possible uses for the reconfigurable logic resources on such a chip which can assist in improving real-time system performance is also presented.

• Type: Conference
• Year: 2003
• Where: IWSOC
• Authors: Neil W. Bergmann, Peter Waldeck, John A. Williams
• Keywords: IWSOC 2003, Multi-processing Real-time Systems, Real-time System, Reconfigurable System-on-chip