Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment

This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and design environment for communication and digital signal processing (DSP) systems, consisting of four multiFPGA based processing units, each capable of emulating 10 million ASIC (Application Specific Integrated Circuits) equivalent gates at an overall system clock rate up to 60 MHz. This translates to over 600 billion 16-bit additions (operations) per second on one unit. An integrated software design flow enables the users to specify the design using a data-flow diagram, then automatically generates both the FPGA implementation for real-time rapid prototyping and a cycle-accurate, bit-true, and functionally equivalent ASIC implementation. For system-level design, the BEE hardware and software support rapid design turn-around and early performance analysis, without full synthesis or hardware mapping, from the high...

• Type: Conference
• Year: 2003
• Where: RSP
• Authors: Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
• Keywords: Equivalent Asic Implementation, Integrated Rapid Prototyping, Rapid Prototyping, Rapid System Prototyping, RSP 2003