Level conversion for dual-supply systems

Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) implemented in a flip-flop to minimize energy, delay, and area penalties due to level conversion. Novel flip-flops presented in this paper incorporate a half-latch LC and a precharged LC. These flip-flops are optimized in the energy-delay design space to achieve over 30% reduction of energy-delay product and about 10% savings of total power in a CVS design as compared to the conventional flipflop. These benefits are accompanied by 24% robustness improvement and 18% layout area reduction. Categories and Subject Descriptors B.6.1 [Design Styles]: Sequential circuits – design styles. General Terms Design, Performance. Keywords Level conversion, dual-supply voltage, flip-flop.

• Type: Conference
• Year: 2003
• Where: ISLPED
• Authors: Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
• Keywords: CVS Design, Dual-supply Voltage, Dual-supply Voltage Design, ISLPED 2003