Design Automation for Deepsubmicron: Present and Future

Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power density are changing now, and have led to integrating logic and layout synthesis. Agressive gate sizing to control timing has become part of any modern back-end. From 0:13 and down, chips will be more susceptive to breakdown during fabrication antenna e ect or to wear out over time electromigration and dealing with these issues will require careful planning. More integration of fast and accurate analysis with a complete design ow chip planning, synthesis, placement and routing will be needed, and still, advancing complexity will a ect design and veri cation. Using hundreds of millions of devices e ectively will be possible only by reusing pre-designed intellectual property IP e ectively and by addressing system-level issues in EDA. In the long term only more radical changes will keep us on Moore's tr...

• Type: Conference
• Year: 2002
• Where: DATE
• Authors: Ralph H. J. M. Otten, Raul Camposano, Patrick Groeneveld
• Keywords: DATE 2002, Design Automation EDA, Design Ow Chip, Hardware, Technology Drives Design