Validation in a Component-Based Design Flow for Multicore SoCs

Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable this integration, we use a design approach called component based-design approach. In this approach, the validation of system integration takes most of design efforts. This paper presents an automatic method of SoCs design validation. Based on a generic simulation wrapper architecture, the presented method provides automatic generation of executable models throughout different stages of SoC design flow. A case study of validating a VDSL application shows the effectiveness of the method. Categories and Subject Descriptors J.6. [Computer-Aided Engineering]: Computer-Aided Design General Terms Design, Verification. Keywords SoC, Component-Based Design, Validation, Cosimulation, ion Levels

• Type: Conference
• Year: 2002
• Where: ISSS
• Authors: Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu
• Keywords: Design, Design Flow, Hardware, ISSS 2002, SoCs Design Validation