Synthesis and Optimization of Interface Hardware between IP's Operating at Different Clock Frequencies

In system-on-a-chip design, interfacing of Intellectual Property(IP) blocks is one of the most important issues. Since most IP’s are provided by different vendors, they have different interface schemes and diflerent operating frequencies. In this paper, we propose a new interface synthesis method that enables one not only to handle the interface between IP’s with different operating frequencies but also to minimize the hardware resource required for the interface. W e have demonstrated the proposed algorithm by applying it to a real design example, MP3 decoder, and verified the IIS-toPCI protocol converter on a real hardware system.

• Type: Conference
• Year: 2000
• Where: ICCD
• Authors: Bong-Il Park, Hoon Choi, In-Cheol Park, Chong-Min Kyung
• Keywords: Diflerent Operating Frequencies, ICCD 2000, Interface Synthesis Method, Real Hardware System