SAT based ATPG using fast justification and propagation in the implication graph

In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As the IG model represents all information on the implemented logic function as well as the topology of a circuit, the proposed techniques inherit all advantages of both general SAT based and structure based approaches to justification, propagation, and implication. These three fundamental Boolean problems are the main tasks to be performed during Automatic Test Pattern Generation (ATPG) such that the proposed algorithms are incorporated into our ATPG tool TIP which is built on top of the implication engine. Working exclusively in the IG, the complex functional operations of justification, propagation, and implication reduce to significantly simpler graph algorithms. They are easily extended to exploit bitparallel techniques. As the IG is automatically generated for arbitrary logics the algorithms remain applica...

• Type: Conference
• Year: 1999
• Where: ICCAD
• Authors: Paul Tafertshofer, Andreas Ganz
• Keywords: Delay Fault Models, Fault Models, Hardware, ICCAD 1999, Implication Engine