Loop Alignment for Memory Accesses Optimization

Portable or embedded systems allow more and more complex applications like multimedia today. These applications and submicronic technologies have made the power consumption criterium crucial. We propose new techniques thanks to which we can optimize the behavioral description of an integrated system before the hardware/software partitioning (Codesign). These transformations are performed on "for" loops that constitute the main parts of the multimedia code which handle the arrays. We present in this paper two new (polynomial) techniques for minimizing memory accesses in loop nests by data temporal locality optimization.

• Type: Conference
• Year: 1999
• Where: ISSS
• Authors: Antoine Fraboulet, Guillaume Huard, Anne Mignotte
• Keywords: Data Temporal Locality, Hardware, ISSS 1999, Multimedia Today, Power Consumption Criterium