A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications

Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem during software synthesis from SDF specifications is the minimization of the memory used by the target code. We develop a powerful formal technique called buffer merging that attempts to overlay buffers in the SDF graph systematically in order to drastically reduce data buffering requirements. We give a polynomial-time algorithm based on this formalism, and show that code synthesized using this technique results in more than a 60% reduction of the buffering memory consumption compared to existing techniques.

• Type: Conference
• Year: 1999
• Where: ISSS
• Authors: Praveen K. Murthy, Shuvra S. Bhattacharyya
• Keywords: Buffering Memory Consumption, Data Buffering Requirements, Hardware, ISSS 1999, Synchronous Dataflow