An Energy-Conscious Exploration Methodology for Reconfigurable DSPs

As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a variety of the macromodules (micro-processors, DSPs, programmable logic and embedded memories) are being reported by a number of companies [2]. Most of these systems target the embedded market where speed, area, and power requirements are paramount, and a balance between hardware and software implementation is needed. Reconfigurable computing devices have recently emerged as one of the major alternative implementation approaches, addressing most of the requirements outlined above. The design and reuse of this new generation of reconfigurable systems calls for a methodology that not only considers all of the PDA (power-delay-area) metrics simultaneously but also allows designers to evaluate different choices at early stages of design. Such a methodology needs to support trade-off between architectures of different ...

• Type: Conference
• Year: 1998
• Where: DATE
• Authors: Jan M. Rabaey, Marlene Wan
• Keywords: DATE 1998, Hardware, Methodology, Programmable Logics, Reconfigurable Dsp