An Integrated HW and SW Fault Injection Environment for Real-Time Systems

This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the processor status, to activate the fault injection procedure, and to gather information about the fault-free system behavior required to implement a set of fault collapsing rules. The overall environment allows at-speed fault injection experiments with negligible intrusiveness in the target system, and can therefore be used to efficiently evaluate real-time systems dependability.

• Type: Conference
• Year: 1998
• Where: DFT
• Authors: Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda, Pierluigi Civera
• Keywords: DFT 1998, Fault Injection, Fault Injection Procedure, Fault Injection Process, VLSI