On primitive fault test generation in non-scan sequential circuits

A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses the concept of sensitizing cubes introduced in an earlier paper and a new, more efficient algorithm for generating them. Sensitizing cubes of the nextstate and output logic are used to obtain static sensitizing vectors that can be applied to the non-scan sequential circuit as part of a vector-pair. These vector-pairs are also used in deriving robust tests. Initializing sequences from a reset state and sequences that propagate fault effects from flip-flops to primary outputs are also generated. The proposed method has been implemented and used to derive tests for primitive faults in ISCAS'89 and MCNC'91 benchmark circuits.

• Type: Conference
• Year: 1998
• Where: ICCAD
• Authors: Ramesh C. Tekumalla, Premachandran R. Menon
• Keywords: Hardware, ICCAD 1998, Non-scan Sequential Circuit, Primitive Faults, Robust Tests