Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems

- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This entails extra memory to save the context and additional clock cycles to restore the context. In this paper, we present techniques and algorithms to incorporate micro-preemption constraints during multi-task VLSI system synthesis. Speci cally, we have developed: i algorithms to insert and re ne preemption points in scheduled task graphs subject to preemption latency constraints, ii techniques to minimize the context switch overhead by considering the dedicated registers required to save the state of a task on preemption and the shared registers required to save the remaining values in the tasks, and iii a controller based scheme to preclude preemption related performance degradation.

• Type: Conference
• Year: 1997
• Where: ICCAD
• Authors: Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
• Keywords: Hardware, ICCAD 1997, Multi-task Vlsi, Preemption Latency Constraints, Task Preemption