Design Methodology for Analog High Frequency ICs

This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the re-use of circuits that were previously designed and validated in other ICs, the authors developed a system that eases the re-use in the top-down design environment. Moreover, a model parameter generation technique for bipolar transistors has been developed and its usefulness has been shown for accurate simulation of high frequency analog ICs.

• Type: Conference
• Year: 1996
• Where: DAC
• Authors: Yasunori Miyahara, Yoshimoto Oumi, Seijiro Moriyama
• Keywords: Analog Ic Design, Computer Architecture, DAC 1996, Frequency Analog Ics, Top-down Design Environment