Register assignment through resource classification for ASIP microcode generation

Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design specifications, accomodation of design errors, and product evolution. However, code generation for ASIPs is a complex problem and new techniques are needed for its success. The register assignment task can be a critical phase, since often in ASIPs, the number and functionality of available registers is limited, as the designer has opted for simplicity, speed, and low area. Intelligent use of register files is critical to the program execution time, program memory usage and data memory usage. This paper describes a methodology utilizing register classes as a basis for assignment for a particular style of ASIP architectures. The approach gives preference to special purpose registers which are the scarce resources. This naturally leads to the objectives of high speed and low program memory usage. The approach has ...

• Type: Conference
• Year: 1994
• Where: ICCAD
• Authors: Clifford Liem, Trevor C. May, Pierre G. Paulin
• Keywords: Hardware, ICCAD 1994, Memory Usage, Program Memory Usage, Register Assignment Task