FIR ( nite impulse response) lters are widely used in digital signal processing. In this paper new architectures for high speed FIR lters with programmable coe cients are presented. Special e orts are undertaken to develop a structure that is well suitable for di erent data rates and therefore may be used within a tool ( lter generator) that generates demand driven dedicated lter structures. The presented structure leads to highly e cient designs, that are useable within di erent environments. The basic design structure is introduced and implementation considerations are discussed. Results of synthesis runs are presented.