Asynchronous Polycyclic Architecture

The Asynchronous Polycyclic Architecture (APA) is a new processor design for numerically intensive applications. APA resembles the VLIW architecture, in that it provides independent control and concurrent operation of low-level functional units within the processor. The main innovations of APA are the provision for multiple threads of control within each processor, the clustering of functional units into groups of functional units that show very weak coupling with each other, decoupled access/execute and eager execution. A supercomputer implementing this architecture is currently being designed, using commercially available parts.

• Type: Conference
• Year: 1992
• Where: CONPAR
• Authors: Geraldo Lino de Campos
• Keywords: Asynchronous Polycyclic Architecture, CONPAR 1992, Distributed And Parallel Computing, Functional Units, Low-level Functional Units