An investigation of the performance of various dynamic scheduling techniques

An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling provides, at the cost of (possibly substantial) additional hardware, the potential to improve upon a static schedule by incorporating run-time information in the scheduling decision. In this study we model several different scheduling techniques and machine configurations. We measure the performance of these models on seven integer and floating point benchmarks taken from the SPEC89 suite. We report the results of these measurements and their implications with respect to the design of high performance superscalar processors.

• Type: Conference
• Year: 1992
• Where: MICRO
• Authors: Michael Butler, Yale N. Patt
• Keywords: Hardware, Important Design Decision, Instruction Scheduling Mechanism, MICRO 1992, Superscalar Processors