A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization

The post-T/pre-T trace refers to the trace captured before/after a target point is reached, respectively. Real time compression of the post-T trace in a circular buffer is a challenging problem since the initial state of the trace being compressed might be corrupted when wrapping around occurs and thus, makes it difficult to reconstruct the trace from the incomplete information stored in the circular buffer. This paper proposes an efficient compression algorithm which is capable of compressing both pre-T and post-T traces. The algorithm is based on an innovative reverse encoding scheme by reversing the order of the datum being encoded and the datum being referred. This algorithm has been successfully implemented in a realtime on-chip AHB bus tracer and has been embedded in a 3D graphics SoC as an application example. The bus tracer costs only 44K gates and runs at 500MHz on 0.13um technology. Experiments have shown that this bus tracer achieves 100%

• Type: Conference
• Year: 2009
• Where: ASPDAC
• Authors: Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
• Keywords: ASPDAC 2009, Bus Tracer, Hardware, Post-t Traces, Post-T/pre-T Trace Refers