Fast Electrical Correction Using Resizing and Buffering

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Current design methodologies are geared towards meeting different design criteria, such as delay, area or power. However, in order to correctly identify the critical parts of a circuit for optimization, the circuit has to be electrically clean

Shrirang K. Karandikar, Charles J. Alpert, Mehmet

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ASPDAC 2007 | Current Design Methodologies | Electrical Violation | Electrical Violation Eliminator | Hardware |

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Added	12 Aug 2010
Updated	12 Aug 2010
Type	Conference
Year	2007
Where	ASPDAC
Authors	Shrirang K. Karandikar, Charles J. Alpert, Mehmet Can Yildiz, Paul Villarrubia, Stephen T. Quay, T. Mahmud

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Fast Electrical Correction Using Resizing and Buffering

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