Coupling-aware Dummy Metal Insertion for Lithography

As integrated circuits manufacturing technology is advancing into 65nm and 45nm nodes, extensive resolution enhancement techniques (RETs) are needed to correctly manufacture a chip design. The widely used RET called off-axis illumination (OAI) introduces forbidden pitches which lead to very complex design rules. It has been observed that imposing uniformity on layout designs can substantially improve printability under OAI. For metal layers, uniformity can be achieved simply by inserting dummy metal wire segments at all free spaces. Simulation results indeed show significant improvement in printability with such a dummy metal insertion approach. To minimize mask cost, it is advantageous to use dummy metal segments that are of the same size as regular metal wires due to their simple geometry. But these dummy wires are printable and hence increase coupling capacitances and potentially affect yield. The alternative is to use a set of parallel sub-resolution thin wires (which will not be p...

• Type: Conference
• Year: 2007
• Where: ASPDAC
• Authors: Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua Xiang
• Keywords: ASPDAC 2007, Coupling Capacitance, Dummy Metal, Dummy Metal Insertion, Hardware