Architecture-Driven Synthesis of Reconfigurable Cells

In this paper, we present a novel method for merging sets of computational patterns into a reconfigurable cell respecting design constraints and optimizing specific design aspects. Each cell can then be used in a run-time reconfigurable processor extension. Our method uses constraint programming to define the pattern merging problem and therefore can easily include design constraints and optimize different design aspects. Experiments carried out on MediaBench test suite indicate 50% average reduction of cell area without increasing critical path.

• Type: Conference
• Year: 2009
• Where: DSD
• Authors: Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin, François Charot
• Keywords: Cell Respecting Design, Design Constraints, DSD 2009, Hardware, Run-time Reconfigurable Processor