Formal Verification of Analog and Mixed Signal Designs in Mathematica

In this paper, we show how symbolic algebra in Mathematica can be used to formally verify analog and mixed signal designs. The verification methodology is based on combining induction and constraints solving to generate correctness for the system with respect to given properties. The methodology has the advantage of avoiding exhaustive simulation usually utilized in the verification. We illustrate this methodology by proving the stability of a modulator.

• Type: Conference
• Year: 2007
• Where: ICCS
• Authors: Mohamed H. Zaki, Ghiath Al Sammane, Sofiène Tahar
• Keywords: Applied Computing, ICCS 2007, Mixed Signal Designs, Symbolic Algebra, Verification Methodology