Translating affine nested-loop programs to process networks

New heterogeneous multiprocessor platforms are emerging that are typically composed of loosely coupled components that exchange data using programmable interconnections. The components can be CPUs or DSPs, specialized IP cores, reconfigurable units, or memories. To program such platform, we use the Process Network (PN) model of computation. The localized control and distributed memory are the two key ingredients of a PN allowing us to program the platforms. The localized control matches the loosely coupled components and the distributed memory matches the style of interaction between the components. To obtain applications in a PN format, we have built the Compaan compiler that translates affine nestedloop programs into functionally equivalent PNs. In this paper, we describe a novel analytical translation procedure we use in our compiler that is based on integer linear programming. The translation procedure consists of four main steps and we will present each step by describing the main...

• Type: Conference
• Year: 2004
• Where: CASES
• Authors: Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
• Keywords: CASES 2004, Distributed Memory, Heterogeneous Multiprocessor Platforms, System Software, Translation Procedure