System-on-chip validation using UML and CWL

In this paper, a novel method for high-level specification and validation of SoC designs using UML is proposed. UML is introduced as a formal model of specification for SoC design. The consistency and completeness of the specification is validated based on the formal UML model. The implementation is validated by a systematic derivation of test scenarios and specification based coverage metrics from the UML model. The method has been applied to the design of a new media-processing chip for mobile devices. The application of the method shows that it is not only effective for finding logical errors in the implementation, but also eliminates errors due to inconsistency and incompleteness of the specification. Categories and Subject Descriptors C.0 [Computer Systems Organization]: General

• Type: Conference
• Year: 2004
• Where: CODES
• Authors: Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo Nakata
• Keywords: CODES 2004, SoC Design, Software Engineering, Specification, UML Model