Practical repeater insertion for low power: what repeater library do we need?

In this paper, we investigate the problem of repeater insertion for low power under a given timing budget. We propose a novel repeater insertion algorithm to compute the optimal repeater number and width in the discrete solution space, as defined by a given repeater library. Using our algorithm, we show that rounding the solution under the continuity assumption to the closest discrete solution candidate may result in suboptimal designs, or it may even fail to find an existing solution. Given a certain tolerance to the degradation of repeater power dissipation, we address two practical and highly important questions: (1) How coarse could the repeater size granularity be? (2) What range should the repeater size be in? Experimental results demonstrate the high effectiveness of the proposed scheme and provide valuable insights into repeater library design. Our approach achieves up to 23% power reduction in comparison to rounding-based approaches. With a 4% power degradation tolerance, rep...

• Type: Conference
• Year: 2004
• Where: DAC
• Authors: Xun Liu, Yuantao Peng, Marios C. Papaefthymiou
• Keywords: Computer Architecture, DAC 2004, Repeater, Repeater Insertion, Repeater Sizes