The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices

Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS devices. Instead of trying to manufacture defect-free chips in which transient errors are assumed to be uncommon, future processor architectures must be designed to adapt to, and coexist with, substantial numbers of manufacturing defects and high transient error rates. We introduce the Recursive NanoBox Processor Grid as an application specific, fault-tolerant, parallel computing system designed for fabrication with unreliable nanotechnology devices. This architecture is composed of many simple processor cells connected together in a two dimensional grid. It uses a recursive black box architecture approach to isolate and mask these transient faults and defects. In this initial study we construct VHDL models of one processor cell and evaluate the effectiveness of our recursive fault masking approach in the prese...

• Type: Conference
• Year: 2004
• Where: DSN
• Authors: A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rangarajan, Priyadarshini Ranganath, David J. Lilja
• Keywords: Computer Networks, DSN 2004, Transient Errors, Transient Fault Rates, Transient Faults