Automated Least-Significant Bit Datapath Optimization for FPGAs

In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [1] which presented a methodology for optimizing for dynamic range--the most significant bit position. In this work, we present an automated optimization technique for the least-significant bit position of circuit datapaths. We present results describing the effectiveness of our methods on typical signal and image processing kernels.

• Type: Conference
• Year: 2004
• Where: FCCM
• Authors: Mark L. Chang, Scott Hauck
• Keywords: Bit Position, Datapath Precision Optimization, FCCM 2004, Significant Bit Position, VLSI