Battery-aware code partitioning for a text to speech system

The advent of multi-core embedded processors has brought along new challenges for embedded system design. This paper presents an efficient, battery aware, code partitioning technique for a text to speech system, which is executed on a multi-core embedded processor. The system achieves significant performance improvements both in terms of execution time as well as battery lifetimes. The mentioned technique provides a new paradigm for battery aware embedded system design which can be easily extended to other applications.

• Type: Conference
• Year: 2006
• Where: DATE
• Authors: Anirban Lahiri, Anupam Basu, Monojit Choudhury, Srobona Mitra
• Keywords: Code Partitioning Technique, DATE 2006, Embedded System Design, Hardware, Multi-core Embedded Processor