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DSD
2006
IEEE

Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads

14 years 4 months ago
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis method assists in the selection of a communication infrastructure early in the design process. The method uses (1) synthetic workload models which are similar to timed Petri nets and (2) the b-model for self-similar workloads. This allows the exploration of larger portions of the design space than possible with traditional stochastic models. The method is illustrated with tutorial examples where both a NoC and a bus based platform are analyzed. Keywords - NoC, Bus, Performance Analysis, Simulation, Benchmark, Synthetic Workloads
Rikard Thid, Ingo Sander, Axel Jantsch
Added 22 Aug 2010
Updated 22 Aug 2010
Type Conference
Year 2006
Where DSD
Authors Rikard Thid, Ingo Sander, Axel Jantsch
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