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ASPDAC
2000
ACM

Reconfigurable synchronized dataflow processor

14 years 2 months ago
Reconfigurable synchronized dataflow processor
- This paper describes the design and implementation of a reconfigurable synchronized dataflow processor (RSDP). The RSDP can configure its hardware to directly represent dataflow graphs (DFGs) of applications. Data are processed while they flow along application-specific datapaths in the RSDP. We have designed three DFGs for benchmarking and evaluated their performance on an RSDP board. The results show that the RSDP running at relatively lower frequency can achieve a competitive performance with a general-purpose processor.
Hiroshi Sasaki, Hitoshi Maruyama, Hideaki Tsukioka
Added 24 Aug 2010
Updated 24 Aug 2010
Type Conference
Year 2000
Where ASPDAC
Authors Hiroshi Sasaki, Hitoshi Maruyama, Hideaki Tsukioka, Nobuyoshi Shoji, Hiroaki Kobayashi, Tadao Nakamura
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