A dual-rail CMOS adiabatic switching circuit approach is described which follows the electroid model of Hall. These circuits can operate in either the retractile cascade or the reversible pipeline architectures. A novel adiabatic circuit technique for generating retractile cascade clock power signals from multiphase sinusoidal AC inputs is presented, along with experimental verification for a simplified version. Design optimization considerations and experimental results for a switched inductor power supply are also presented. Finally, the operation of a reversible adiabatic 4 bit ripple counter is described. Its operation is verified experimentally and its dissipation is compared with that of a voltage scaled conventional CMOS 4 bit ripple counter.
David J. Frank, Paul M. Solomon