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32

ISSS
1995
IEEE

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Scheduling and resource binding for low power

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Scheduling and resource binding for low power

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Decisions taken at the earliest steps of the design process may have a signiﬁcantimpact on the characteristics of the ﬁnal implementation. This paper illustrates how power consumption issues can be tackled during the scheduling and resource-binding steps of high-level synthesis. Algorithms for these steps targeting at low-power data-paths and trading off, in some cases, speed and area for low power are presented. The algorithms focus on reducingthe activity ofthe functional units (adders, multipliers) by minimizing the transitions of their input operands. The power consumption of the functional units accounts for a large fraction of the overall data-path power budget.

Enric Musoll, Jordi Cortadella

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Added	26 Aug 2010
Updated	26 Aug 2010
Type	Conference
Year	1995
Where	ISSS
Authors	Enric Musoll, Jordi Cortadella

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