Code Generation for Streaming: An Access/Execute Mechanism

Access/execute architectures have several advantages over more traditional architectures. Because address generation and memory access are decoupled from operand use, memory latencies are tolerated better, there is more potential for concurrent operation, and it permits the use of specialized hardware to facilitate fast address generation. This paper describes the code generation and optimization algorithms that are used in an optimizing compiler for an architecture that contains explicit hardware support for the access/execute model of computation. Of particular interest is the novel approach that the compiler uses to detect recurrence relations in programs and to generate code for them. Because these relations are often used in problem domains that require significant computational resources, detecting and handling them can result in significant reductions in execution time. While the tectilques discussed were originally targeted for one specific architecture, many of the techniques...

• Type: Conference
• Year: 1991
• Where: ASPLOS
• Authors: Manuel E. Benitez, Jack W. Davidson
• Keywords: Address Generation, ASPLOS 1991, Explicit Hardware Support, Fast Address Generation, Programming Languages