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ASPLOS
1991
ACM
14 years 3 months ago
The Cache Performance and Optimizations of Blocked Algorithms
Blocking is a well-known optimization technique for improving the effectiveness of memory hierarchies. Instead of operating on entire rows or columns of an array, blocked algorith...
Monica S. Lam, Edward E. Rothberg, Michael E. Wolf
ASPLOS
1991
ACM
14 years 3 months ago
LimitLESS Directories: A Scalable Cache Coherence Scheme
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
David Chaiken, John Kubiatowicz, Anant Agarwal
ASPLOS
1991
ACM
14 years 3 months ago
NUMA Policies and Their Relation to Memory Architecture
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
William J. Bolosky, Michael L. Scott, Robert P. Fi...
ASPLOS
1991
ACM
14 years 3 months ago
Code Generation for Streaming: An Access/Execute Mechanism
Access/execute architectures have several advantages over more traditional architectures. Because address generation and memory access are decoupled from operand use, memory laten...
Manuel E. Benitez, Jack W. Davidson
ASPLOS
1991
ACM
14 years 3 months ago
Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
ASPLOS
1991
ACM
14 years 3 months ago
Process Coordination with Fetch-and-Increment
Eric Freudenthal, Allan Gottlieb
ASPLOS
1991
ACM
14 years 3 months ago
The Interaction of Architecture and Operating System Design
Thomas E. Anderson, Henry M. Levy, Brian N. Bersha...