Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

21

ICCD
1991
IEEE

favoriteEmaildiscussreport

87views Hardware» more ICCD 1991»

Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams

14 years 2 months ago

Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams

Download computing.ece.vt.edu

Pranav Ashar, Abhijit Ghosh, Srinivas Devadas

Real-time Traffic

Hardware | ICCD 1991 |

claim paper

Related Content

» On the Relation between SAT and BDDs for Equivalence Checking

» Improving SATBased Bounded Model Checking by Means of BDDBased Approximate Traversals

» Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking

» Combinational Equivalence Checking Using Satisfiability and Recursive Learning

» Ordered Binary Decision Diagrams and the DavisPutnam Procedure

» High capacity and automatic functional extraction tool for industrial VLSI circuit designs

» SatisfiabilityBased Detailed FPGA Routing

» Symbolic Model Checking of AnalogMixedSignal Circuits

» Symbolic Equivalence Checking

Post Info
More Details (n/a)

Added	27 Aug 2010
Updated	27 Aug 2010
Type	Conference
Year	1991
Where	ICCD
Authors	Pranav Ashar, Abhijit Ghosh, Srinivas Devadas

Comments (0)