On multiple-voltage high-level synthesis using algorithmic transformations

— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by maximization of task mobilities in that the increase of mobilities may raise the possibility of assigning tasks to lowvoltage components. The mobility means the ability to schedule the starting time of a task. It is defined as the distance between its as-late-as-possible (ALAP) schedule time and its as-soonas-possible (ASAP) schedule time. To earn task mobilities, we use loop shrinking, retiming and unfolding techniques. The loop shrinking can first reduce the iteration period bound (IPB) and, then, the others are employed for shortening the minimum achieved sample period (MASP) as much as possible. The minimization of MASP results in high task mobilities. Thereafter, we can assign tasks with high mobilities to low-voltage components and minimize energy dissipation under resource and latency constraints. W...

• Type: Conference
• Year: 2005
• Where: ASPDAC
• Authors: Hsueh-Chih Yang, Lan-Rong Dung
• Keywords: ASPDAC 2005, Hardware, Loop Shrinking, Schedule Time, Task Mobilities