This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture and derived its noise and signal transfer function (NTF/STF) in symbolic forms. We then used the TF in MINLP to generate optimal topologies for a variety of design requirement, such as modulator complexity, sensitivity and power consumption, which appeard as cost functions. Experiments show the superiority of synthesized topologies as compared to traditional solutions.