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DATE
2010
IEEE

Automatic microarchitectural pipelining

14 years 21 days ago
Automatic microarchitectural pipelining
Abstract--This paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct transformations including conversion to a synchronous elastic form, early evaluation, inserting empty buffers, anti-tokens, and retiming. The design exploration is done by solving an optimization problem followed by simulation of solutions. The method is explained on a DLX microprocessor example. The impact of different microarchitectural parameters on the performance is analyzed.
Marc Galceran Oms, Jordi Cortadella, Dmitry Bufist
Added 18 Oct 2010
Updated 18 Oct 2010
Type Conference
Year 2010
Where DATE
Authors Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky
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