Total power optimization combining placement, sizing and multi-Vt through slack distribution management

Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power and timing are often conflicting objectives during optimization. In this paper, we propose a novel total power optimization flow under performance constraint. Instead of using placement, gate sizing, and multiple-Vt assignment techniques independently, we combine them together through the concept of slack distribution management to maximize the potential for power reduction. We propose to use the linear programming (LP) based placement and the geometric programming (GP) based gate sizing formulations to improve the slack distribution, which helps to maximize the total power reduction during the Vt-assignment stage. Our formulations include important practical design constraints, such as slew, noise and short circuit power, which were often ignored previously. We tested our algorithm on a set of industrial-str...

• Type: Conference
• Year: 2008
• Where: ASPDAC
• Authors: Tao Luo, David Newmark, David Z. Pan
• Keywords: ASPDAC 2008, Hardware, Power Reduction, Total Power, Total Power Optimization