Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels

In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a region selection algorithm and a heuristic for run-time application mapping which minimizes the communication energy consumption, while still providing the required performance guarantees. The proposed technique allows for new applications to be easily added to the system platform with minimal inter-processor communication overhead. Moreover, our approach scales very well for large designs. Finally, the experimental results show as much as 50% communication energy savings compared to arbitrary mapping solutions. Categories and Subject Descriptors J.6 [Computer Applications]: Computer-Aided Design – computer-aided design (CAD). General Terms Algorithms, Performance, Design Keywords Dynamic application mapping, Networks-on-Chip, Low-power

• Type: Conference
• Year: 2007
• Where: CODES
• Authors: Chen-Ling Chou, Radu Marculescu
• Keywords: CODES 2007, Communication Energy, Communication Energy Consumption, Run-time Application Mapping, Software Engineering