Analog parallelism in ring-based VCOs

The performance advantages in parallel ring-based VCOs are explored. When the number of VCOs is doubled, the parallel VCOs enhance phase noise by 3dB, and the within-chip process-induced variation is reduced by 3dB, which improves chip-limited yield. The parallel VCOs trade off circuit area and power in exchange. The parallelism advantages in analog and digital systems are compared. Categories and Subject Descriptors B.7.1 [Types and Design Styles]: Advanced technologies, Microprocessors and microcomputers General Terms Design, Performance, Reliability, Experimentation Keywords Analog parallelism, ring-based voltage-controlled oscillator, process-induced variation, microprocessor, phase noise, clock period jitter, phase-locked loop

• Type: Conference
• Year: 2008
• Where: DAC
• Authors: Daeik D. Kim, Choongyeun Cho, Jonghae Kim
• Keywords: Computer Architecture, DAC 2008, Parallel Vcos, Phase Noise, Process-induced Variation