Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture

In this paper we present results of parallelization of Deblocking Filter (DF) of H.264 video codec on Decoupled Threaded Architecture (DTA). We parallelized the code trying to exploit all available thread level parallelism and to make it suitable for DTA architecture. Experimental results show that significant speedup can be achieved and that DTA architecture can efficiently exploit available parallelism. We also show comparison with parallelized version of DF for Cell architecture.

• Type: Conference
• Year: 2008
• Where: DSD
• Authors: Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink
• Keywords: Cell Architecture, DSD 2008, DTA Architecture, Hardware, Thread Level Parallelism