Efficient utilization of multi-core architectures relies on the partitioning of applications into tasks and mapping the tasks to cores. In some applications (e.g. H.264 video deco...
Platform-based design represents the most widely used approach to design System-On-Chip (SOC) applications. In this context, the Design Space Exploration (DSE) phase consists of o...
In this paper we present results of parallelization of Deblocking Filter (DF) of H.264 video codec on Decoupled Threaded Architecture (DTA). We parallelized the code trying to exp...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, A...
The long-word and very long-word addition required in cryptography applications generally requires custom hardware support provided by ASICs or application-specific instructions i...
Scott Miller, Ambrose Chu, Mihai Sima, Michael McG...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
We discuss the issue of reliable transmission of bounded streams of data samples over simple wireless channels offered by low-end RF modules. Traditional solutions, i.e., window-b...
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
The aim of this work is to present a method for rounding quadratically converging algorithms that improves their performance. This method is able to reduce significantly the numbe...
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...