To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat-topped) power-clock voltage waveform, which must be generated by a resonant element with a very high Q (quality factor). Recently, MEMS resonators have attained very high frequencies and Q factors, and are becoming widely used in communications SoCs for RF signal filtering, amplification, etc. In the ADIAMEMS project at the University of Florida, we are designing custom MEMS resonators for driving fully-adiabatic pipelined logic based on the 2LAL (two-level adiabatic logic) family previously developed at UF. The resonator design is being optimized to maximize its effective Q factor and area efficiency, at a frequency chosen to maximize the powerperformance advantage of the adiabatic logic. Our analyses indicate that the adiabatic approach will eventually lead to orders-of-magnitude improvements in power-perfor...